LMX1205 JESD Buffer/Multiplier/Divider

Texas Instruments LMX1205 JESD Buffer/Multiplier/Divider has a high-frequency capability, extremely low jitter, and programmable clock input and output delay. These features make this device a great approach to clock high precision, high-frequency data converters without degradation of signal-to-noise ratio. Each of the four high-frequency clock outputs and additional LOGICLK outputs with a larger divider range is paired with a SYSREF output clock signal. The SYSREF signal for JESD204B/C interfaces can either be passed or internally generated as input and re-clocked to the device clocks. The noiseless delay adjustment at the input path of the high-frequency clock input and individual clock output paths ensures low-skew clocks in a multi-channel system. For the data converter clocking application, having the jitter of the clock less than the aperture jitter of the data converter is essential. In applications where more than four data converters need to be clocked, various cascading architectures can be developed using multiple devices to distribute all the SYSREF signals and high-frequency clocks required. The Texas Instruments LMX1205 is an exemplary choice for clocking data converters when combined with an ultra-low noise reference clock source, especially when sampling above 3GHz.