MCX MCUs for the next era of Industrial and IoT Edge Computing
Headline in top dark blue area: MCX MCUs for the next era of Industrial and IoT Edge Computing
Subhead in white area: Factors driving new MCU applications
- Open lock icon in orange circle with text: Security concerns
- No power icon in orange circle with text: Power limitations
- Connected icon in orange circle with text: IoT connectivity
- Head & gear icon in orange circle with text: Machine learning requirements
Subhead in dark blue area: Main features of MCX portfolio
Showing NXP MCX MCU with Green and Light Blue Chart on left & right side
Left side: Features listed in shades of green
- Ultra-low power
- Scalability, easy migration
- On-chip memory, non-volatile RAM with full ecc and self-test
- Flexible interfaces, intelligent peripherals
Right side: features listed in shades of blue
- Advanced on-chip security
- Unified software and tools, supported by MCUXpresso
- Neural processing unit
- Connectivity, BLE 5.2 radio Ethernet & best-in-class serial communications
Subhead in white area: Four new MCX series
Left side: MCX N with robotic arm icon in dark blue circle
- Dual-core 150–250MHz
- Integrated EdgeLock secure subsystem, NPU and DSP unit
MCX W with signal icon in green circle
- Single core 32–150MHz
- Integrated wireless connectivity
Right side: MCX A with appliance icon in orange circle
- Single core 48–96MHz
- Optimized for cost constrained applications
MCX L with battery icon in light blue circle
- Single core 50–100MHz
- Optimized for low power applications
Subhead in blue area: Looking at three key elements of the MCX
Showing two columns comparing cores, new or updated are shown in orange vs light blue
Left side: Cortex-M4 in light blue vs Right side: Cortex-M33 in orange
Left column for Cortex-M4 (note: all in light blue)
- ARMv7-M
- Serial wire/ITAG
- WIC
- SIMD/DSP
- FPU
- AHB Lite
- MPU (PMSAv7)
- NVIC (max 240 IROs)
- ETM
Right column for Cortex-M33 (note: mainly in orange)
- ARMv8-M mainline
- Serial wire/ITAG (light blue)
- WIC (light blue)
- SIMD/DSP (light blue)
- FPU
- AHB5
- MPU (PMSAv8)
- NVIC (max 480 IROs)
- ETM
- MTB
- Enhance debug
- Co-processor interface
- Stack limit checking
- TrustZone
EDGELOCK® Secure Enclave icon in white circle
Callouts off to right side:
- Device-wide security intelligence
- Run-time attestation
- Silicon root of trust
- Key management
- Extensive cryptographic services
- Trust provisioning
- Simplified path to certifications
Block diagram of NXP eIQ® Neutron NPU
Center Block contains Compute Pipe
Left side with 4 blocks contains:
- Weight Decoder
- Data Canvas
- De-quantization
- Activation Engine
Right side with 3 blocks contains:
- Bus Interfaces (built-in DMA)
- Control
- Buffers
Subhead: ML Operator Acceleration Achieved with MCX NPU
Acceleration bar chart shown with 3 callouts measured for acceleration:
- CONV2D (3x3 with Pad)
- Pointwise Convolution
- Depthwise Conv2d (3x3)
CM33 measured 0 for all three
NPU measured…
34 for CONV2D (3x3 with Pad)
47 for Pointwise Convolution
31 for Depthwise Conv2d (3x3)
Subhead in white area: MCUXpresso developer experience
Supporting text/statement: Enhanced scalability, usability and portability, making it easier and faster to develop
Shown: MCUXpresso ecosystem of IDEs, SDK, CFG, SEC Callouts:
- Production grade software framework & reference
- Editing compiling & debugging
- Pin, clock & peripheral configuration
- Key & certificate management, encrypting, signing & programming
Subhead in blue area: Applications
- Smart home shown with smart home icon
- Motor control shown with motor icon
- Robotics shown with robot icon
- Power & energy shown with solar panel icon
- Infrastructure shown with smart city icon
- Tools & appliances shown with appliance icon
- IoT shown with IoT icon
Bottom: Mouser & NXP logos shown